1. Field of the Invention
The present invention relates miniaturization of a semiconductor relay apparatus, and a method of fabricating a wiring board of the structure.
2. Description of the Related Art
Recently, to improve the reliability and decrease the size of meters such as a semiconductor tester, non-contact relays such as a semiconductor relay apparatus are often used in place of the conventional contact relays.
The operation principle of this semiconductor relay apparatus will be explained below with reference to FIG. 4. A light-emitting diode (LED) 55 and photovoltaic IC 56 oppose each other, and the photovoltaic IC 56 and a metal oxide silicon field-effect transistor (MOS-FET) 57 are connected. Light from the LED 55 is photoelectrically converted by the photovoltaic IC 56. The generated voltage is used to drive the MOS-FET 57, and turn on/off an electric current flowing between A and B in FIG. 4 in the MOS-FET 57. The LED 55 and photovoltaic IC 56 must be separated by a certain distance in order to irradiate a whole photodiode array on the surface of the photovoltaic IC 56 with the light from the LED 55.
A semiconductor tester uses several thousand relays, and a substrate mounting these relays is very expensive. By miniaturizing the semiconductor relay apparatus, it is possible to miniaturize the semiconductor tester and reduce the cost of the substrate incorporated into the tester. Therefore, miniaturization of the semiconductor relay apparatus is being required from the market.
With this market requirement as a background, various semiconductor relay apparatuses have been invented. As one prior art, a semiconductor relay apparatus introduced in Jpn. Pat. Appln. KOKAI Publication No. 11-163705 will be described below with reference to FIG. 5. This semiconductor relay apparatus has a wiring board 37. The wiring board 37 has a recess 36 formed in substantially the center, and a wiring pattern (not shown). An LED 38 as a light-emitting device is mounted on the bottom surface of the recess 36. An LED front electrode and substrate electrode (not shown) are connected by a metal wire 39. A photovoltaic IC 40 as a light-receiving device covers the opening of the recess 36, and opposes the LED 38. The photovoltaic IC 40 is bonded to the wiring board 37 via bumps 41 by flip chip bonding.
On the surface of the wiring board 37 on which the photovoltaic IC 40 is mounted, a MOS-FET 42 as an output device is bonded via bumps 43 by flip chip bonding. The photovoltaic IC 40 and MOS-FET 42 are electrically connected by a wiring pattern (not shown) on the wiring board 37. A light-transmitting resin 44 is filled between the LED 38 and photovoltaic IC 40. Portions of the photovoltaic IC 40 and MOS-FET 42 on the side of the wiring board 37 are sealed by a light-shielding resin 45.
In this semiconductor relay apparatus, the photovoltaic IC 40 and MOS-FET 42 are mounted on the wiring board 37 by flip chip bonding. This makes the package size smaller than that obtained by conventional wire bonding. Note that the MOS-FET 42 used in this semiconductor relay apparatus must be a lateral double-diffusion MOS-FET (to be referred to as a lateral MOSFET hereinafter) having a gate electrode, source electrode, and drain electrode formed on the same surface of a chip.
As shown in FIG. 6, a conventional MOS-FET having a drain electrode formed on the backside of a chip is mounted on a wiring board by forming a hole 46 for receiving an LED and two holes 47 and 48 for receiving the MOS-FET. In this structure, the MOS-FET is mounted by wire bonding. This requires a space for the chip and a space for a wire bonding capillary, so the package size significantly increases.
An example of a conventional silicon substrate fabrication method will be described below with reference to FIGS. 7A to 7F. First, holes 50 are formed from the front-side surface of a silicon wafer 49 (FIG. 7A). A silicon oxide layer 51 as an insulating film is formed on the front-side surface of the substrate by thermal oxidation (FIG. 7B). A contact film 52 such as a titanium film is formed in the holes 50 and on the front-side surface of the substrate by sputtering, and the holes 50 are filled with copper 53 by plating (FIG. 7C). The two surfaces of the substrate are then mechanically polished to open the two ends of each hole (FIG. 7D). Insulating films 54 are formed on both the front-side and backside surfaces of the substrate by chemical vapor deposition (CVD) (FIG. 7E). Necessary portions are opened by reactive ion etching (RIE) (FIG. 7F). After that, interconnections are formed on the front-side surface of the substrate as needed.
The conventional semiconductor relay apparatuses described above have the following problems.
In the semiconductor relay apparatus shown in FIG. 5, the connecting path between external connecting terminals arranged on the backside surface of the substrate and MOS-FET terminals is lengthened. This makes it impossible to obtain sufficient high-frequency signal passing characteristics.
When the substrate as shown in FIG. 6 is used, the size of the semiconductor relay apparatus is excessively increased by routing of wires, or the connecting path between external connecting terminals and MOS-FET terminals is lengthened.
Also, a small semiconductor relay apparatus substrate having this shape is difficult to fabricate by using the conventional ceramic substrate or resin substrate from the viewpoints of electrode position accuracy and flatness. If a silicon substrate having a high dimensional accuracy is selected, it is difficult to fabricate a substrate which has a large projection on its front-side surface and in which electrodes on its front-side and backside surfaces are connected by through-hole electrodes. For example, in the conventional method, both the projection and through-hole electrodes are formed from the front-side surface of a wafer. However, the wafer is difficult to hold in the polishing step of exposing the through-hole electrodes to the backside surface.
The present invention has been made in consideration of the above situation, and has as its object to provide a semiconductor relay apparatus structure which is suitable in miniaturizing a semiconductor relay apparatus without degrading its performance, and a method of fabricating a substrate.